Xilinx
IP Integration Node v.1.0
The LabVIEW FPGA IP Integration Node provides cycle accurate simulation within the LabVIEW execution environment for third party IP. In addition, the node provides a wizard interface that simply requires selecting VHDL files or a Xilinx Coregen® *.
Active-HDL v.8. 3. 2026
Active-HDL™ is a Windows® based integrated FPGA Design and Simulation solution. Active-HDL includes a full HDL graphical design tool suite and RTL/gate-level mixed-language Simulator.
Ant16 Logic Analyser v.2.1.0.65
The Ant16 software uses VCL40.BPL, a 1.8MByte shared Borland support library. Like the Ant8, the Ant16 logic analyzer is compact, easy to use, powerful, and inexpensive.
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